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Processor Architecture and Systems Synthesis

We live surrounded by a great diversity of information devices, such as personal computers, mobile phones, digital cameras, digital TVs, video recorders and players, electronic dictionaries, and game systems, and these devices are becoming increasingly indispensable to our lives. What all these information devices have in common is that they rely on large-scale, complex digital circuits to perform high-speed data communication and advanced media (e.g., image, audio) processing. Have you ever attempted to take apart any of these kinds of devices? As shown in Fig. 1, their inner parts consist largely of various electronic components assembled on boards and films. Some of these components are known as LSIs—or large-scale integrated circuits. Externally, these appear simply to be black components that are compact and thin, yet their boards are made of silicon and integrate up to hundreds of millions of transistors. Obviously very advanced technology is required to manufacture this kind of large-scale, complex LSI, but it is also very important to think of a rational architecture to ensure high performance and low power consumption furthermore having it designed to operate free of errors and as rapidly as possible.

This lab engages in research and development on LSI architectures (i.e., what component circuits to use and how to combine them), which is the core of information devices, and design methodology (i.e., how to make designs efficient), based on the motto "practical and demonstrable". In this way we aim to contribute to society by enabling the creation of systems that permit information to be processed in more sophisticated and powerful ways, and which are faster, consume less power, are more compact and less expensive.

LSI_e

Fig.1 Inner Parts of Information Devices

Academic Staff

Takashi SATO

Professor (Graduate School of Informatics)

Research Interests

  • CAD for nanometer-scale LSI design
  • Fabrication-aware design methodology
  • Performance optimization for variation tolerance

Contacts

Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
Yoshida-hon-machi, Sakyo, Kyoto, 606-8501 Japan
TEL: +81-75-753-4801
FAX: +81-75-753-4802
E-mail: takashi(at)i.kyoto-u.ac.jp
Office: Room S305, 3rd Floor, Research Bldg. No.9, Kyoto University Yoshida Campus

Masayuki HIROMOTO

Junior Associate Professor (Graduate School of Informatics)

Research Interests

  • Embedded systems for image processing and computer vision
  • FPGA, reconfigurable architecture, and its applications
  • VLSI design and design automation

Contacts

Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
Yoshida-hon-machi, Sakyo, Kyoto, 606-8501 Japan
TEL: +81-75-753-4804
FAX: +81-75-753-4804
E-mail: hiromoto(at)i.kyoto-u.ac.jp
Office: Room S315, 3rd Floor, Research Bldg. No.9, Kyoto University Yoshida Campus

Introduction to R&D Topics

Reconfigurable systems

The elements that perform arithmetic processing can be broadly divided into CPUs and hardware engines. CPUs are flexible wherein software can be employed to make them perform many different kinds of processing tasks. On the other hand, hardware engines have the advantages of low power consumption and high performance. Now, a new class of "rewritable" circuits (reconfigurable devices), that combine the advantages of both of these elements is attracting interest (see Fig. 2). In other words, by "writing" the circuit configuration using a designated program or the like, it is possible to freely realize a hardware engine that has the desired functions. Recently, devices are being proposed that aim to simultaneously provide excellent flexibility and performance by repeated rewriting during runtime. In this lab, we have focused on the potential of reconfigurable devices from an early stage, and our goal is to develop "self-evolving systems."

RECONF

Fig.2 "Rewritable" Circuit

Image processing systems

Image processing involves handling massive amounts of data in a short time — usually far exceeding the ones used in text or audio processing. For this reason, the development of image processing systems relies on a variety of schemes and sophisticated techniques. Our lab's research on image processing is particularly focused on image compression and image recognition. Image compression is an indispensable technology for efficiently storing and transmitting image data, which is of vital importance in devices such as digital cameras, video cameras, and mobile phone cameras. The results of our research are applied to commercial LSIs. Image recognition—for example picking out particular people from images taken by a camera, and tracking their behavior is important for surveillance cameras, automobile control systems, and other applications. So far, our lab has been carrying out complementary research on algorithms (theory and processing procedures for image recognition) and implementation (system configuration optimization) which have been explored by separate communities.